The project aims to develop a strong rad-hard by design (RHBD) methodology for non volatile semiconductor memories to be used in space applications taking the best from standard CMOS (Complementary Metal-Oxide Semiconductor field effect transistors) submicron (180nm) silicon processes.
The main ideas at the base of the project are the following:
- development of rad-hard integrated silicon devices acting on the design more than on fabrication process;
- application of non volatile memory technology (floating gate/floating trap cells) in space applications.
Beyond the atmosphere (meaning in electronic equipment for satellites, probes or more in general spacecrafts) many particles (electrons, protons, high energy ions) collide with silicon devices releasing energy and possibly disrupt operations.
There are two main effects of radiations on silicon devices:
- long term effects (TID, Total Ionizing Dose);
- short term and randomic effects (SEE, Single Event Effects).
The first one, TID, gives a progressive degradation of the devices thus taking the chip to a general malfunction after months or years while the second one, SEE, is strongly dependent on the amount (and nature) of energized particles and in the worst case scenarios can be destructive.